Customer arrays inside fabricator master panels

PCB Sub-Array / Matrix Optimizer

Compare rectangular board matrices and orientations across multiple master panels. Keep each delivered array inside your assembly limits, reserve gaps and rails explicitly, and find the layouts with the most boards or the highest material utilization.

Editable teaching dimensions

Board, array, and master-panel assumptions

Single board and spacing

Finished rectangular outline, before rotation.

Finished rectangular outline, before rotation.

Edge-to-edge gap between board columns.

Edge-to-edge gap between board rows.

Customer-array rails and assembly limits

Full board-edge-to-array-edge allowance, including any outer routing clearance.

Full board-edge-to-array-edge allowance, including any outer routing clearance.

Includes rails, in the assembly orientation.

Includes rails, in the assembly orientation.

Master-panel borders and array spacing

Unavailable material outside the usable panel.

Unavailable material outside the usable panel.

Edge-to-edge gap between complete arrays; not added at outer edges.

Edge-to-edge gap between complete arrays; not added at outer edges.

CSV or tab-separated text, one panel per line. Sizes use the selected input units. Up to 12 panels; optional header; quote labels containing commas. Panel axes stay fixed.

Array rotation on the master preserves the delivered assembly dimensions and rotates its rails too. Every array on a given master uses the same orientation.

Declared search range

Fits are computed on a 0.001 mm grid after rounding inputs. Board and assembly dimensions must be at least 0.1 mm; lengths are capped at 10,000 mm. The search tests every permitted matrix within the declared range in a cancellable local worker.

The example is ready.

Board dimensions, panel labels, and results stay in this browser tab. ToolQuill does not upload or save the plan.

Two grids, two sets of allowances

A customer array is the unit delivered to assembly: a repeated matrix of one board plus its outer handling rails. The fabricator’s master panel contains a repeated grid of those complete arrays, plus master borders and gaps between arrays. Board gaps are counted only between boards; array gaps are counted only between arrays.

For c columns, the delivered array width is c × board width + (c − 1) × board gap X + 2 × rail X. Height uses the equivalent row formula. The rail allowance is the entire distance from the outer board edge to the array edge: include any routing clearance there rather than counting it twice.

The maximum assembly width and height apply to that delivered array, including rails, before it is rotated onto a master panel. Board rotation swaps board width and height within the array. Whole-array rotation swaps the complete footprint on the master, including the rails; it does not change the delivered assembly orientation.

Yield, utilization, and ranking

Arrays across the usable master width are floor((usable width + array gap X) ÷ (placed array width + array gap X)). The extra gap in this expression removes the final, unnecessary outer gap. Arrays per panel multiply the across and down counts; boards per panel multiply this count by boards per array.

Gross utilization is total finished board area divided by the entire master-panel area. Usable utilization uses the area left after removing master borders. Rails, gaps, and scrap are excluded from the numerator. The layout summary also reports the area covered by complete arrays, which includes their rails and internal gaps.

Rank by boards per panel to maximize raw yield, or by gross utilization to compare material efficiency across panel sizes. Ties favor higher gross utilization, then board yield, then more boards per delivered array to reduce handling, then smaller arrays and fixed orientation/matrix order. Equivalent square orientations can appear separately.

Supported model and exports

The search is exhaustive for the declared range of 1–100 columns and rows, board-count constraints, enabled 0°/90° rotations, and up to 12 master sizes. It places identical rectangular arrays in uniform rows and columns. It does not mix orientations within one master, stagger rows, nest irregular outlines, mix board designs, or optimize prices, order quantities, coupons, or manufacturing yield.

SVG uses millimetre physical dimensions, a top-left origin, and repeated vector patterns so large layouts remain compact. ASCII DXF R2000 (AC1015) uses millimetres, a bottom-left origin, and closed LWPOLYLINE rectangles on MASTER, USABLE, ARRAY, and BOARD layers. DXF is limited to 20,000 rectangles; larger results retain SVG and structured reports. The outlines are planning geometry, with no Gerber, routing tabs, score paths, tooling holes, or fiducials. Verify imported size and coordinates in your receiving CAD/CAM software.

Confirm the physical panel before release

The example values illustrate the workflow. Confirm actual master-panel availability, assembly conveyor limits, board separation, component overhang, tooling and fiducial space, coupon requirements, support, warpage, copper balance, material grain, and process tolerances with your fabricator and assembler. A geometrically fitting plan is not a fabrication approval or an IPC conformance result.

Eurocircuits’ customer-panel guidelines distinguish borders, separation clearance, routing, and V-cut requirements. Its Panel Editor guide describes repeat counts, board rotation, and panel dimensions. PCBWay’s assembly-panel requirements provide another supplier’s process context. These are supplier references, not universal presets.

Frequently asked questions

Why can a smaller customer array produce more boards per master?

Array size includes outer rails, and only whole arrays fit on the master. A larger matrix can leave a strip too narrow for another array. Exhaustive comparison exposes those step changes instead of assuming the largest assembly-compatible array is best.

Does the optimizer find the globally best possible panel?

It finds the best result inside the declared uniform-grid search. Mixed rotations, irregular nesting, different rail designs, supplier-specific exclusions, and matrix counts outside your entered range could produce a better physical plan.

Can I enter zero gaps for V-scoring?

Yes, zero gaps are supported. Whether they are manufacturable depends on board geometry, thickness, component clearance, scoring direction, and the supplier’s process. The tool does not create score lines or validate those conditions.

Why do my inch values change slightly?

Both units are converted to a 0.001 mm grid for deterministic fit decisions. Reports and geometry always use the effective millimetre dimensions. Switching units converts the current dimensions and master-panel rows together.

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